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RF2870
0
Typical Applications * CDMA Cellular Systems * JCDMA Cellular Systems * AMPS Cellular Systems Product Description
-A-
CDMA LOW NOISE AMPLIFIER/MIXER 900MHz DOWNCONVERTER
* General Purpose Downconverter * Commercial and Consumer Systems * Portable Battery-Powered Equipment
0.10 C A
0.05 C
3.00
2 PLCS
The RF2870 is a receiver front-end for CDMA cellular applications. It is designed to amplify and downconvert RF signals, while providing 28.5dB of stepped gain control range. Features include digital control of LNA gain, mixer gain, and power down mode. Another feature of the chip is adjustable IIP3 of the mixer using an off-chip current setting resistor. Noise figure, IP3, and other specs are designed to be compatible with the IS-98B interim standard for CDMA cellular communications. The IC is manufactured on an advanced Silicon Germanium BiCMOS process and is assembled in a 3mmx3mm, 16pin, QFN package.
1.50 TYP
2 PLCS
0.90 0.85 0.70 0.65
0.10 C B
0.05 0.00
3.00 12 MAX
2 PLCS
0.10 C B
-B-
1.37 TYP
2 PLCS
-CDimensions in mm.
SEATING PLANE
2.75 SQ 0.60 0.24 TYP
0.10 C A 0.10 M C A B
0.30 0.18
2
NOTES: 1. Shaded lead is pin 1. 2 Dimension applies to plated terminal: to be measured between 0.20 mm and 0.25 mm from terminal end.
PIN 1 ID R.20
1.65 SQ. 1.35 0.50 0.30
0.50
Optimum Technology Matching(R) Applied
Si BJT Si Bi-CMOS InGaP/HBT GaAs HBT SiGe HBT GaN HEMT GaAs MESFET Si CMOS SiGe Bi-CMOS
Package Style: QFN, 16-Pin, 3x3
Features * 3mmx3mm LNA/Mixer Solution * Adjustable Mixer Current/IIP3
MIX GAIN
MIX IN
ISET1
ISET2
* Meets IMD Tests with Three Gain States/Two Logic Control Lines
12 LNA OUT 11 LNA EMITTER 10 LNA IN 9 LNA GAIN
16 IF OUT+ 1 IF OUT- 2 GND 3 LO IN 4 5 VCC
15
14
13
* Integrated TX LO Buffer Amplifier * All Pins ESD Protected
Ordering Information
RF2870 RF2870 PCBA CDMA Low Noise Amplifier/Mixer 900MHz Downconverter Fully Assembled Evaluation Board Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
6 LO OUT
7 TX BUFF ENABLE
8 ENABLE
Functional Block Diagram
RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA
Rev A8 030507
8-1
RF2870
Absolute Maximum Ratings Parameter
Supply Voltage Input LO and RF Levels Operating Ambient Temperature Storage Temperature
Rating
-0.5 to +5.0 +6 -40 to +85 -40 to +150
Unit
VDC dBm C C
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
Overall
RF Frequency Range IF Frequency Range
Specification Min. Typ. Max.
800 to 900 0.1 2.65 1.8 2.75 400 3.15 VS +0.6 0.4
Unit
MHz MHz V V V
Condition
T = 25C, VCC =2.75V
Power Supply
Supply Voltage, VS Logic High Logic Low
Cellular Band JCDMA Band LNA (On)
Gain Noise Figure Input IP3 Isolation 13.0 +9.0 14.5 1.1 +11.5 23 -3.0 3.0 +25.0 3.5 13.0 2.0 6.5 14.0 +3.0 +14.5 16.0 1.3 dB dB dBm dB dB dB dBm dB dB dB dB dB dBm dBm dB dB
Freq=869MHz to 894MHz Freq=832MHz to 870MHz LNA 50 match
LNA (Off)
Gain Noise Figure Input IP3 Isolation -4.0 +20.0 -2.0 4.0
Mixer - CDMA/JCDMA/FM
Gain Noise Figure Input IP3 LO to RF Isolation +1.0 +12.5 36 11.5 0.5 14.5 3.5 7.5 16.0 Mixer Preamp ON Mixer Preamp OFF Mixer Preamp ON (TX Buffer OFF) Mixer Preamp OFF Mixer Preamp ON Mixer Preamp OFF Mixer Preamp ON Mixer Preamp OFF
8-2
Rev A8 030507
RF2870
Parameter
Cellular Band JCDMA Band, cont'd Other
LO-IF Isolation RF-IF Isolation LNA Out to Mixer In Isolation LO-LNA In Isolation, Any State 30 40 40 35 1 dB dB dB dB pF LNA GAIN, ENABLE, MIX GAIN, TX BUFF ENABLE
Specification Min. Typ. Max.
Unit
Condition
Control Lines
Input Capacitance
Local Oscillator Input
Cellular - CDMA or FM Input Power Input Frequency -10 685 1053 784 954 -10 722 942 -4 0 710 1078 809 979 0 760 980 dBm MHz MHz MHz MHz dBm MHz MHz
IF=184MHz IF=184MHz IF=85MHz IF=85MHz
Cellular - JCDMA Input Power Input Frequency
-4
IF=110MHz IF=110MHz
TX (Local Oscillator) Buffer
Cellular - CDMA or FM Output Power Output Frequency -9.0 685 1053 784 954 -5.5 -2.0 710 1078 809 979 dBm MHz MHz MHz MHz mA dBm MHz MHz mA Single-ended 50 load IF=184MHz IF=184MHz IF=85MHz IF=85MHz
Current Consumption Cellular - JCDMA Output Power Output Frequency Current Consumption
2 -9 722 942 -5.5 760 980 2
Single-ended 50 load IF=110MHz IF=110MHz
Rev A8 030507
8-3
RF2870
Evaluation Board Current Measurement (Typical Values for VCC =2.75V)
ENABLE Gain Control State Power Down LNA On, Mixer Preamp On, TX Buffer Off LNA On, Mixer Preamp Off, TX Buffer Off LNA Bypassed, Mixer Preamp On, TX Buffer Off LNA Bypassed, Mixer Preamp Off, TX Buffer Off 0 1 1 1 1 LNA GAIN X 0 0 1 1 MIX GAIN X 0 1 1 0 TX BUFF ENABLE X 0 0 0 0 IDC (mA) <0.01 26.5 20.6 20.9 15.0
NOTES: All IDC current numbers include bias circuitry current of 1.5mA to 2.0mA (dependent on mode). TX Buffer On: Add 2.4mA to total current. Cascaded Performance (Typical Values for VCC =2.75V) NOTE: All total current numbers include bias circuitry current of 1.5mA to 2.0mA (dependent on mode).
CELL CDMA Parameter Cascaded: Gain (dB) Noise Figure (dB) Input IP3 (dBm) LNA ON LNA OFF Mixer Preamp On 25.0 1.9 -9.0 7.5 12.0 +8.4 LNA ON LNA OFF Mixer Preamp Off 14.0 4.5 +2.0 30 40 40 45 20.6 -3.5 19.5 +18.8 30 40 40 45 15.0
LO to IF Isolation (dB) 30 30 IF1 to RF Isolation (dB) 40 40 IF2 to RF Isolation (dB) 40 40 LO to LNA IN Isolation (dB) 45 45 Total Current (mA) 26.5 20.9 NOTE: Assumes 2.5dB image filter insertion loss. The TX Buffer Enable is off.
Gain Control State Table
Gain State High Gain Mid Gain Low Gain Ultra-Low Gain LNA Gain Logic Input 0 0 1 1 Mix Gain Logic Input 0 1 1 0 Corresponding Device State LNA Mixer Amplifier Preamp On On On Off Off On Off Off Comments IMD Test 1 and 2 IMD Test 3 and 4 IMD Test 5 and 6
8-4
Rev A8 030507
RF2870
Pin 1 Function IF OUT+ Description
CDMA IF output. Open collector.
Interface Schematic
CDMA+ CDMA-
2 3 4
IF OUTGND LO IN
CDMA IF output. Open collector.
See pin 1.
LO single-end input. Matched to 50.
LO IN 70
5 6 7
VCC LO OUT TX BUFF ENABLE ENABLE
External bypass capacitor may be required. LO output. Internal DC block. Drives 50. Logic input. High enables TX LO output buffer amplifiers.
TX BUF
8
Logic input. Low level powers down the IC.
ENABLE
9
LNA GAIN
Logic input. See Gain Control State table.
LNA GAIN
10
LNA IN
Cellular LNA input.
CELL LNA IN
VCC CELL LNA OUT
CELL LNA EMITTER
11 12 13
LNA EMITTER LNA OUT MIX GAIN
Cellular LNA emitter. A small inductor connects this pin to ground. Cellular LNA gain can be adjusted by the inductance. Cellular LNA output. Simple external L-C components required for matching and VCC supply. Logic input. See Gain Control State table.
See pin 10. See pin 10.
MIX GAIN
14 15 16
ISET2 ISET1 MIX IN
An external resistor R2 connected to this pin sets the current of the mixer. Decreasing resistance increases current. Sets internal voltage reference. External resistor required. Cellular mixer RF single-end input. Matched to 50.
CELL MIX IN
Pkg Base
GND
Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias.
Rev A8 030507
8-5
RF2870
ISET Pins ISET1 sets the internal reference voltage for the bias control circuits to all functional blocks. An external resistor of 4.3k to ground is recommended. We do not recommend adjusting this resistor value. This resistor is pulled out to allow for a higher precision off chip value and not as a significant tuning adjustment. ISET2 sets the DC current through the mixer and mixer preamplifier. Higher resistance to ground results in lower current. Lower current will improve mixer NF but will degrade IIP3. Mixer and the mixer preamp gain is not significantly changed with current.
8-6
Rev A8 030507
RF2870
Application Schematic Differential IF SAW Filter Topology
MIX GAIN 0.1 F 3.9 nH
6 OUT
Note 3
1.2 pF
Note 6
3
FL4 RF Saw
GND GND 4 1
GND GND
Note 2
C2 IF Saw VCC CDMA IF+ CDMA IF10 9 4 5
4.3 k
6.8 k
Note 1
2
IN
5
3.0 pF
Note 8 Notes 7, 9
L1
R1
C1 1
16
15
14
13 12
VCC
10 nH L2 C3 C2 L1 1.2 nH 2 3 LO IN 4 5 6 7 8 11 10
Notes 4, 9
100 pF
Note 3
CELL LNA IN 33 nF 33 nH
Notes 5, 9
9
LNA GAIN ENABLE
2870310, Rev. 1
33 nF VCC
Note 8
2.2 nH
TX BUF EN LO OUT
NOTES: Differential IF tuning components are dependent on IF frequency board layout and board parasitics. Please consult RFMD applications engineering for tuning assistance. If any functional blocks are not being used, the unused pins can be left with no connection. IF output matching component values are dependent on board layout, IF SAW filter and the IF frequency selected. Please contact RFMD application engineering for assistance with IF output matching. 1. 2. 3. 4. 5. 6. 7. 8. 9. This resistor sets the mixer preamp and mixer currents. Lowering the resistance results in higher currents. Sets internal bias voltage. Recommend 4.3k. DC-blocking capacitor. Determines trade-off between IIP3 and gain. Higher value inductor means lower gain and higher IIP3. Cell LNA input matching for optimum IIP3. Low impedance path to ground at low frequency for optimum IIP3. Mixer input matching. For output matching and a DC supply bias choke. Input or output matching. Coupling of coils on the input, output and emitter of the LNA should be minimized to reduce the risk of oscillation. We recommend separating the inductors and/or positioning them 90 relative to each other.
Layout Note: To minimize losses and radiation, the RF signal traces should be as short as possible. The IF+ and IF- output traces should be symmetrical. All bypass capacitors and matching capacitors must have a ground via very close to the capacitor. Each capacitor should have its own ground via. All traces should be 50 transmission lines. Position inductors to reduce coupling. (See note 9.)
Rev A8 030507
8-7
RF2870
Application Schematic Single-End IF Matching
MIX GAIN 3.9 nH 1.2 pF
Note 6
2 IN 3 GND GND 1
Note 3
6
OUT
0.1 F
5
RF Saw
GND 4
GND
Note 2
C3
C1
4.3 k
6.8 k
Note 1
3.0 pF
Note 8
VCC CDMA IF+ CDMA IF10 9 4 5
L2
L1
R
C2 1
16
15
14
13 12 11 10 33 nF 9
Note 3
VCC
Notes 7, 9
100 pF
100 pF CDMA IF Saw
10 nH
Notes 4, 9
C1
2 3
1.2 nH CELL LNA IN 33 nH
Notes 5, 9
LO IN VCC
4 5 6 7 8
2.2 nH
Note 8
LNA GAIN ENABLE TX BUF EN
LO OUT
See notes on previous page.
8-8
Rev A8 030507
RF2870
IF Output Interface Network
Single-End IF Matching
C3 CDMA IF+ CDMA IF10 9 4 5
C1
IF+
VCC CDMA IF Saw 100 pF
L2
L1
R
C2
IF-
C1
L1, C1, C2, and R form a current combiner which performs a differential to single-ended conversion at the IF frequency and sets the output impedance. In most cases, the resonance frequency is independent of R and can be set according to the following equation:
1 f IF = ----------------------------------------------------------L1 2 ----- ( C 1 + 2C 2 + C EQ ) 2
Where CEQ is the equivalent stray capacitance and capacitance looking into pins 9 and 10. An average value to use for CEQ is 2.5pF. R can then be used to set the output impedance according to the following equation:
1 - 1- - 1 R = -------------------- - ----- 4 R OUT R P
where ROUT is the desired output impedance and RP is the parasitic equivalent parallel resistance of L1. C2 should first be set to 0 and C1 should be chosen as high as possible (not greater than 39pF), while maintaining an RP of L1 that allows for the desired ROUT. If the self-resonant frequencies of the selected C1 produce unsatisfactory linearity performance, their values may be reduced and compensated for by including C2 capacitor with a value chosen to maintain the desired FIF frequency. L2 and C3 serve dual purposes. L2 serves as an output bias choke, and C3 serves as a series DC block. In addition, L2 and C3 may be chosen to form an impedance matching network if the input impedance of the IF filter is not equal to ROUT. Otherwise, L2 is chosen to be large (suggested 120nH) and C3 is chosen to be large (suggested 22nF) if a DC path to ground is present in the IF filter, or omitted if the filter is DC-blocked.
Rev A8 030507
8-9
RF2870
Differential IF Matching
C2 CDMA IF Saw VCC CDMA IF+ CDMA IF10 9 4 5
IF+
L1
R
C1
IF-
L2 100 pF C2 L1
L1 and C1 are chosen to resonate at the desired IF frequency. C1 can be omitted and the value of L1 increased and utilized solely as a choke to provide VCC to the open-collector outputs, but it is strongly recommended that at least some small-valued C1 (a few pF) be retained for better mixer linearity performance. R is normally selected to match the input impedance of the IF filter. However, mixer performance can be modified by selecting an R value that is different from the IF filter input impedance, and inserting a conjugate matching network between the Resistive Output Network and the IF filter. C2 serve dual purposes. C2 serves as a series DC block when a DC path to ground is present in the IF filter. In addition, C2 may be chosen to improve the combine performance of the mixer and IF filter. L2 should choose to resonate with the internal capacitance of the SAW filter. Usually, SAW filter has some capacitance. Otherwise, L2 could be eliminated. A practical approach to obtain the differential matching is to tune the mixer to the correct load point for gain, IIP3, and NF using the single-end current combiner method. Second, use the component values found in the single-end approach as starting point for the differential matching. The two-shunt capacitors in the single-end could be converted in a parallel capacitor and the parallel inductor in the single-end need to be converted in two-choke inductor. Third, set the DC block capacitors (C2) in the differential-end matching to a high value (i.e., 100pF) and retune the resonate circuit (C1 & L1) and the resistor (R) for optimal performance. After optimal performance is achieved and if performance is not satisfactory, decrease the series capacitors until optimal performance is achieved.
8-10
Rev A8 030507
RF2870
Evaluation Board Schematic IF Frequency=183.6MHz
P2 P1-1 C54 33 nF P1-2 C46 33 nF P1-3 C53 33 nF P1-4 C55 33 nF J7 CELL MIX IN 50 strip MIX GAIN C9 0.1 F C13 1.2 pF L9 3.9 nH C56 DNI FL4 RF Saw
GND GND IN 4 1 5 6 3 GND GND 2
P3 ENABLE TX BUF EN MIX GAIN LNA GAIN P3-1 C20 1 F + 1 2 3 CON3 VCC1 GND GND
1 2 3 4 CON4
J2 CDMA IF
50 strip C2 33 nF FL2 IF Saw DNI C12 DNI C10 DNI L2 DNI C11 DNI
10 9 4 5
C6 33 nF L26 DNI C8 DNI C22 100 pF C31 DNI C17 8.2 pF L6 220 nH L7 DNI L8 68 nH R2 9.1 k C35 DNI
R5 4.3 k C3 16 pF 1 C5 16 pF 2 3 4 5
R4 6.8 k
C58 DNI
OUT
C69 3.0 pF VCC C25 100 pF
50 strip
J8 CELL LNA OUT
VCC
16
15
14
13 12 11 10 9
L21 10 nH L5 1.5 nH
50 strip C4 33 nF L1 33 nH
J9 CELL LNA IN
J4 LO IN
50 strip
6
7
8
VCC C7 33 nF L17 2.2 nH TX BUF EN LNA GAIN ENABLE 50 strip
J5 LO OUT
Evaluation Board Schematic IF Frequency=85.38MHz
(Stock Evaluation Boards are at this IF)
P2 P1-1 P1-2 P1-3 P1-4 1 2 3 4 CON4 J6 CELL MIX IN 50 strip MIX GAIN C9 0.1 F L3 3.9 nH J1 CDMA IF 50 strip
C2 33 nF
P3 ENABLE TX BUF EN MIX GAIN LNA GAIN P3-1 C20 1 F + 1 2 3 CON3 VCC1 GND GND
C53 33 nF
C13 1.2 pF
C56 DNI
1
GND
GND
FL6 Filter
SAWTEK_2x2_5
FL2 IF SAW C12 DNI L2 DNI C11 DNI
9 10 5 4
C6 33 nF C8 DNI L26 DNI
C17 18 pF L8 220 nH L7 DNI L11 150 nH R2 DNI
C3 43 pF C35 DNI
R5 4.3 k
R4 6.8 k
C58 DNI
3
C69 3.0 pF VCC C25 33 nF
50 strip
J5 CELL LNA OUT
VCC
16 1
15
14
13 12 11 10 9
L21 10 nH
C10 DNI
C22 100 pF C31 DNI
C5 43 pF
2 3 4 5 6 7 8
L3 DNI
L4 1.2 nH C4 33 nF L1 33 nH
L5 DNI
L6 DNI
J2 LO IN
50 strip
50 strip
J4 CELL LNA IN
VCC C7 10 pF L17 2.2 nH
C55 33 nF
LNA GAIN ENABLE C54 33 nF
2870400, Rev. -
J3 LO OUT
50 strip
TX BUF EN C46 33 nF
Rev A8 030507
8-11
RF2870
Evaluation Board Layout Board Size 2"x2"
Board Thickness 0.061", Board Material FR-4, Multi-Layer
Assembly Top
Mid
Back
8-12
Rev A8 030507
RF2870
PCB Design Requirements
PCB Surface Finish The PCB surface finish used for RFMD's qualification process is Electroless Nickel, immersion Gold. Typical thickness is 3inch to 8inch Gold over 180inch Nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern
1.50 (mm) Typ. 0.50 (mm) Typ.
Pin 16
A = 0.28 x 0.69 (mm) Typ. B = 0.69 x 0.28 (mm) Typ. C = 1.60 (mm) Sq.
A
Pin 1
A
A
A
Pin 12
0.75 (mm) Typ. B B 1.50 (mm) Typ.
B 0.50 (mm) Typ. B C B B 0.60 (mm) Typ. A A A A
B B
Pin 8
0.60 (mm) Typ. 0.75 (mm) Typ.
Figure 1. PCB Metal Land Pattern (Top View)
Rev A8 030507
8-13
RF2870
PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier.
1.50 (mm) Typ. 0.50 (mm) Typ.
Pin 16
A = 0.38 x 0.79 (mm) Typ. B = 0.79 x 0.38 (mm) Typ. C = 1.70 (mm) Sq.
A
Pin 1
A
A
A
Pin 12
0.75 (mm) Typ. B B 1.50 (mm) Typ.
B 0.50 (mm) Typ. B C B B 0.60 (mm) Typ. A A A A
B B
Pin 8
0.60 (mm) Typ. 0.75 (mm) Typ.
Figure 2. PCB Solder Mask Pattern (Top View)
8-14
Rev A8 030507

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